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Essentials

This space is dedicated to essential thing to remember when developing and writing SystemVerilog/UVM code.

Quotes

Brian Kernighan - Elements of Programming Style - 1994

Everyone knows debugging is twice as hard as writing a program in the first place.

Tips

Miguel Aleman - The Verification Mindset - 2026

The RTL is one possible implementation of the specification. The specification is the absolute truth. Reversing that order is like building a building and then writing the blueprints based on what ended up being built — it works until someone asks why.

  • Confiar es bueno, verificar es mejor
  • Pienso, luego verifico